Flash memory is a non-volatile memory or storage medium which can be electrically programmed, erased, and reprogrammed. In Flash memory, information may be stored in an array of memory cells made from floating-gate transistors. The memory cells may be single-level cells (SLCs), wherein each memory cell stores only one bit of information or multi-level cells (MLCs) (e.g., triple-level cells (TLCs)), wherein each memory cell can store more than one bit of information. There are two main types of Flash memory: NAND type Flash memory and NOR type Flash memory, wherein the memory cells exhibit characteristics similar to the corresponding NAND and NOR logic gates, respectively. Flash memory is seen in various applications such as in memory cards, universal synchronous bus (USB) Flash drives, solid-state hard drives, etc.
Advantages of Flash memories include characteristics such as non-volatility, fast read access times, mechanical shock resistance, high durability, etc. However, Flash memories may also have some drawbacks. For example, although a Flash memory can be read or programmed one byte or one word at a time in a random access fashion, a Flash memory may only be erased one block (comprising multiple words) at a time. Another drawback relates to the finite number of program/erase cycles that may be supported by a Flash memory before the Flash memory wears down and integrity of storage thereof deteriorates. Yet another drawback pertains to a characteristic referred to as “read disturb,” wherein a read operation on certain memory cells of a NAND Flash memory, for example, can cause the information stored in neighboring memory cells within the same memory block to change over time, or become incorrectly programmed. A similar problem may also arise with a program disturb, wherein programming some memory cells may lead to unintended disturbances of other memory cells. Furthermore, the storage of information in memory cells of a Flash memory is based on floating-gates of the memory cells being charged. However, over time, issues of charge loss from the memory cells due to the floating gates may also lead to loss of storage integrity of the memory cells.
The various above-mentioned drawbacks may lead to errors or bit-flips in the data stored in a Flash memory comprising a NAND Flash memory, for example. The rate at which bit-flips may occur can increase as the Flash memory ages with more program/erase cycles. The bit-flip error rate may also increase with advancing generations of memory technology as device sizes shrink, because interference can increase with technology scaling (shrinking).
Although bit-flip errors are soft errors which may be corrected or restored by refreshing (e.g., rewriting or scrubbing) the data stored in the Flash memory, there is no standard mechanism in the industry for refreshing data stored in Flash storage devices. In general, data refresh operations in Flash storage devices may be performed in a vendor-specific manner which may vary across various manufacturers. For example, when a consuming or processing device reads data from a page of a NAND Flash memory, if error control coding (ECC) is performed on that page, then one manner of data refresh may be based on determining if a number of bits with errors to be corrected is greater than a pre-specified threshold. If the number of such bit errors is greater than the pre-specified threshold, then the processing device (or a memory controller in the processing device) may direct a refresh operation to be performed on that page of the NAND Flash memory. However, this method of directing refresh operations is not standard across the various consuming devices, and as such, different consuming devices may employ different manners of directing refresh operations on the same NAND Flash memory.
In some cases, refresh operation of Flash memory may be driven by the Flash memory itself, which may initiate an internal refresh without external indications or triggers from the consuming device or host device (e.g., a processor connected to the Flash memory). However, a manufacturer or vendor of the Flash memory may not have substantial information on the retention requirements of the host device or target application which uses the Flash memory. Thus, the refresh operation internally controlled by the Flash memory may lack information regarding the target application, so the refresh operations may be carried out without knowledge of when to start or stop refreshing in order to avoid performance impacts on the target application.
Accordingly, there is a need in the art for techniques for performing refresh operations on Flash memory, which avoid the aforementioned drawbacks.